Microarchitecture

Shows rename, the active list and precise branch recovery fitted together in one shipped out-of-order core.

Separates perfect from realistic prediction, renaming and aliasing, and shows how little ILP survives the real ones.

Puts circuit delay on wakeup, select and bypass, capping issue width and window size before ILP runs out.

The origin of SMT, where another thread fills one thread's idle issue slots at a cost to both.

Turns window size, issue width and miss events into cycles lost, making an ILP limit a cycle count.

Defines the tagged geometric-history predictor shipped designs converge on, and the limit of what it can learn.

Carries the tagged geometric scheme to indirect jumps and calls, where interpreters and virtual dispatch stall.

Defines the penalty as pipeline refill plus window drain, so it exceeds pipeline depth and is not constant.

Establishes that predictor state is shared and trainable across contexts, the root of every mitigation and its cost.

Defines the indirect-branch and store-bypass controls (IBRS, STIBP, IBPB, SSBD) and states which carry a large cost.

Calls its own latency spreadsheet an estimate and lists its assumptions, the vendor claim the measured tables check.

Also in §2§14

States where measured predictor, op cache and port findings disagree with the vendor's account of an x86 core.

Also in §2

States why its measured figures differ from the vendor's and names which latencies cannot be measured accurately.

Also in §2

Where each latency, throughput and port entry links to its microbenchmark, so any value can be re-run.

Measured per-instruction tables for an Apple AArch64 core, each entry linked to the counter experiment behind it.

Sets the method for finding which hard bound binds a loop, testing its cycles against each in turn.

Models the predecoder, decoders, micro-op cache and loop buffer closely enough to predict front-end bound loops.

Measures what the vendor leaves untimed in an AVX-512 licence change, a throttled phase then a frequency step.

Finds an undocumented optimisation by its counter signature and bandwidth, and sets the method for what manuals omit.