Compilers and codegen

Shows how a source change alters the emitted instructions across compilers, versions and flags, with nothing installed.

Explains how the signed-overflow and aliasing rules let a trip count be known and a store loop become memset.

Reads the binary that shipped, with source lines and symbolised branch targets, rather than a recompiled snippet.

Predicts loop throughput and port pressure from the scheduling model, and states it models neither front end nor caches.

Measures instruction latency and throughput with counters, so the model llvm-mca predicts from is checked, not trusted.

Lists what each -O level turns on, the inlining limits, and that -Ofast admits transforms invalid for conforming code.

Shows with real codegen that an abstraction is free only when inlining and the ABI allow it, and the cost when either refuses.

Fixes the rule that a non-trivial class goes by reference to a caller-made temporary, the cost a wrapped pointer pays.

States what PLT calls and interposition cost, and the visibility controls a library needs to inline its own exports.

Defines whole-program LTO against partitioned WHOPR, and the LGEN, WPA and LTRANS stages that run -flto in parallel.

Defines the thin link, summaries analysed whole-program then parallel backends, and the cache for incremental rebuilds.

Defines -march against -mtune, the psABI levels, and -mprefer-vector-width, the switch for full-width AVX-512 code.

Defines target_clones, one function per ISA behind a resolver the dynamic linker runs, so a generic build ships AVX-512.

Lists what -ffast-math implies, of which -fassociative-math alone frees a float reduction, and -ffp-contract for FMA.

States what the vectorisers need, aliasing disproved or checked at run time, and where a float reduction stays in order.

Also in §7

Defines the remarks that make the compiler say which loop it left scalar and why, so the fix targets the real blocker.

Defines the instrumented and sampled workflows, why their profiles cannot mix, and the cost of a wrong training input.

Defines the address-to-source mapping with discriminators that lets a stale production profile still drive FDO.

States why a profile applied to the final binary beats one mapped to source, and the layout passes accuracy enables.

States what full effect needs, relocations kept at link time and a branch-stack sample profile, neither on by default.

States the design, not a result: basic-block sections and a relink, no binary rewrite, so layout needs no disassembly.