Learn / Out
NUMA and multi-socket
Read first
A page's node is decided at first touch, not when memory is allocated or a policy is set, and every vendor table below depends on the BIOS node mode of the machine it ran on.
- Sources
- 15 entries in 3 parts
- Reproduce it
- 10-first-touch
- Related sections
- None in this section
- In the MCP server
cpuperf://section/10
NUMA and Linux memory placement
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01
The one account tying first touch, policy scope, zone reclaim and page movement together from the implementer's side.
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02 What is NUMA? manual
Defines nodes, zonelists and the distance-ordered fallback that places an allocation once local memory runs out.
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03 NUMA Memory Policy manual
The normative statement of policy scopes, every mode including weighted interleave, and the cpuset intersection rule.
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04
Defines numa_hit, numa_miss and numa_foreign, the counters that show whether a policy put pages where it said.
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05 numactl repository
Reference implementation of the policy API, prints the distance table and binds a binary that cannot be rebuilt.
Reproduce it
first touch of fresh pages against the second pass.
Reproduce it · 10-first-touch First touch Allocation is not placement; the first touch pays the fault and picks the homeTopology and interconnects
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01 NUMA Memory Performance manual
Explains the firmware-rated latency and bandwidth per initiator and target, and memory-side caches, that rank nodes.
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02
Where Intel names the mesh, UPI socket links, the directory-running home agent, and how SNC splits the cache.
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03
Defines SNC on current parts as one node per compute die, and fixes the numactl and numastat checks of placement.
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04
Discloses the I/O die, GMI and xGMI links, the NPS modes with their interleave widths, and the cache-as-NUMA override.
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05
Defines the mesh, the home nodes holding the system cache and snoop filter, and the gateways joining sockets or CXL.
Migration, balancing and measured effects
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01 move_pages(2) manual
Defines per-page migration of a running process, and a query reporting each page's node, the direct test of first touch.
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02 sysctl kernel numa_balancing manual
Defines the hinting-fault sampling behind automatic balancing and tiering, and warns the overhead may not pay off.
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03
Proves against the kernel balancer that controller and link congestion, not remote latency, is what placement manages.
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04 Intel Memory Latency Checker manual
Measures the node-to-node latency and bandwidth matrix and loaded latency on the x86 at hand, which no datasheet states.
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05
Tabulates measured bandwidth by NPS mode, cores per die, boost and SMT, so the NPS trade-off is shown, not asserted.